<!-- HTML header for doxygen 1.8.20-->
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
	<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
	<meta http-equiv="X-UA-Compatible" content="IE=9"/>
	<meta name="generator" content="Doxygen 1.9.4"/>
	<meta name="viewport" content="width=device-width, initial-scale=1"/>
	<title>Raspberry Pi Pico SDK: hardware_dma</title>
	<!-- <link href="tabs.css" rel="stylesheet" type="text/css"/> -->
	<script type="text/javascript" src="jquery.js"></script>
	<script type="text/javascript" src="dynsections.js"></script>
	<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
	<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="search/searchdata.js"></script>
<script type="text/javascript" src="search/search.js"></script>
    <link href="https://fonts.googleapis.com/css2?family=Roboto:wght@300;400;500&display=swap" rel="stylesheet">
	<link href="doxygen.css" rel="stylesheet" type="text/css" />
	<link href="normalise.css" rel="stylesheet" type="text/css"/>
<link href="main.css" rel="stylesheet" type="text/css"/>
<link href="styles.css" rel="stylesheet" type="text/css"/>
</head>
<body>
	<div class="navigation-mobile">
		<div class="logo--mobile">
			<a href="/"><img src="logo-mobile.svg" alt="Raspberry Pi"></a>
		</div>
		<div class="navigation-toggle">
			<span class="line-1"></span>
			<span class="line-2">
				<p>Menu Toggle</p>
			</span>
			<span class="line-3"></span>
		</div>
	</div>
	<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
		<div class="logo">
			<a href="index.html"> <img src="logo.svg" alt="Raspberry Pi"></a>
			<span style="display: inline-block; margin-top: 10px;">
				v2.1.0
			</span>
		</div>
		<div class="navigation-footer">
			<img src="logo-mobile.svg" alt="Raspberry Pi">
			<a href="https://www.raspberrypi.com/" target="_blank">By Raspberry Pi Ltd</a>
		</div>
<!-- 		<div class="search">
			<form>
				<input type="search" name="search" id="search" placeholder="Search">
				<input type="submit" value="Search">
			</form>
		</div> -->
<!-- Generated by Doxygen 1.9.4 -->
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
var searchBox = new SearchBox("searchBox", "search",'Search','.html');
/* @license-end */
</script>
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
$(function() {
  initMenu('',true,false,'search.php','Search');
  $(document).ready(function() { init_search(); });
});
/* @license-end */
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
$(document).ready(function(){initNavTree('group__hardware__dma.html',''); initResizable(); });
/* @license-end */
</script>
<div id="doc-content">
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
     onmouseover="return searchBox.OnSearchSelectShow()"
     onmouseout="return searchBox.OnSearchSelectHide()"
     onkeydown="return searchBox.OnSearchSelectKey(event)">
</div>

<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<iframe src="javascript:void(0)" frameborder="0" 
        name="MSearchResults" id="MSearchResults">
</iframe>
</div>

<div class="header">
  <div class="summary">
<a href="#groups">Modules</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#enum-members">Enumerations</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle"><div class="title">hardware_dma<div class="ingroups"><a class="el" href="group__hardware.html">Hardware APIs</a></div></div></div>
</div><!--header-->
<div class="contents">

<p>DMA Controller API.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
Modules</h2></td></tr>
<tr class="memitem:group__channel__config"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__channel__config.html">channel_config</a></td></tr>
<tr class="memdesc:group__channel__config"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA channel configuration. <br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga6c72cc3aafb409371f60fefd0463e289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6c72cc3aafb409371f60fefd0463e289">DMA_IRQ_NUM</a>(irq_index)</td></tr>
<tr class="memdesc:ga6c72cc3aafb409371f60fefd0463e289"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the <a class="el" href="group__hardware__irq.html#gaf30862f51b5994ffd5863176a185d137">irq_num_t</a> for the nth DMA interrupt.  <a href="group__hardware__dma.html#ga6c72cc3aafb409371f60fefd0463e289">More...</a><br /></td></tr>
<tr class="separator:ga6c72cc3aafb409371f60fefd0463e289"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="typedef-members" name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:gadedf0e3a016a52299183d4d54d9e71e9"><td class="memItemLeft" align="right" valign="top"><a id="gadedf0e3a016a52299183d4d54d9e71e9" name="gadedf0e3a016a52299183d4d54d9e71e9"></a>
typedef enum <a class="el" href="group__hardware__dma.html#ga6f0a19defc495cfa6078364122266014">dreq_num_rp2350</a>&#160;</td><td class="memItemRight" valign="bottom"><b>dreq_num_t</b></td></tr>
<tr class="memdesc:gadedf0e3a016a52299183d4d54d9e71e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">DREQ numbers for DMA pacing on RP2350 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>) <br /></td></tr>
<tr class="separator:gadedf0e3a016a52299183d4d54d9e71e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8def0ea481095c94f3a0dd0b4fed999e"><td class="memItemLeft" align="right" valign="top"><a id="ga8def0ea481095c94f3a0dd0b4fed999e" name="ga8def0ea481095c94f3a0dd0b4fed999e"></a>
typedef enum <a class="el" href="group__hardware__dma.html#ga864c3313155ab20116b62a64bf78df6d">dreq_num_rp2040</a>&#160;</td><td class="memItemRight" valign="bottom"><b>dreq_num_t</b></td></tr>
<tr class="memdesc:ga8def0ea481095c94f3a0dd0b4fed999e"><td class="mdescLeft">&#160;</td><td class="mdescRight">DREQ numbers for DMA pacing on RP2040 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>) <br /></td></tr>
<tr class="separator:ga8def0ea481095c94f3a0dd0b4fed999e"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga6f0a19defc495cfa6078364122266014"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6f0a19defc495cfa6078364122266014">dreq_num_rp2350</a> { <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ad7529b7e45af2d7eab4b740ff15b49d8">DREQ_PIO0_TX0</a> = 0
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ac5fedec084064e1d9ff9c6a382c1ccf8">DREQ_PIO0_TX1</a> = 1
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aa2e360dbf123d634d08e5fae27aa29e5">DREQ_PIO0_TX2</a> = 2
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a156b1b999c6b2dd877545c8c79060a30">DREQ_PIO0_TX3</a> = 3
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ac4bc12d74b758a7b39c1977c401e2fe1">DREQ_PIO0_RX0</a> = 4
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a19b55b49bb618eed839edccba14c0d8f">DREQ_PIO0_RX1</a> = 5
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a967d6b5eb2d3e06113b2b1606ef2af2c">DREQ_PIO0_RX2</a> = 6
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a10f8705467782c859f05f82aa3c3c9f5">DREQ_PIO0_RX3</a> = 7
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a3c22f2c9eb4a49654bba70dbc99bc893">DREQ_PIO1_TX0</a> = 8
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a37f1bb39c3aa38a753df88e7e6c57feb">DREQ_PIO1_TX1</a> = 9
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a13d7cb74708595298d788ba0ce25f6a0">DREQ_PIO1_TX2</a> = 10
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aaa5859ea1daaf5f0760fb4dea23116c3">DREQ_PIO1_TX3</a> = 11
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a833bfa99e8b74de9bfc1872958a742e3">DREQ_PIO1_RX0</a> = 12
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a8da9c5655eb51f2fb8a33b16827796a9">DREQ_PIO1_RX1</a> = 13
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a0198dfe2da7237817e780a483144df8f">DREQ_PIO1_RX2</a> = 14
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ab093d84a1df12a37ab6e9d62ee1f6d57">DREQ_PIO1_RX3</a> = 15
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a6a3e73df9d0e562b41b571e272100302">DREQ_PIO2_TX0</a> = 16
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a37c21bac317747dda953dca55954db16">DREQ_PIO2_TX1</a> = 17
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014abadc20c78c83d2db4fcf3980f1d5b87f">DREQ_PIO2_TX2</a> = 18
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aa94c2b7f002c28a6050dda127aeaf3b1">DREQ_PIO2_TX3</a> = 19
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a8bb28cdeea9248c04665464cabc6b1e6">DREQ_PIO2_RX0</a> = 20
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a58a5eb511f85599b5e2b93cee7537b18">DREQ_PIO2_RX1</a> = 21
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a9f4f2e7b3cf525ff519db02b0047bf87">DREQ_PIO2_RX2</a> = 22
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ae7c631f739c8fb2e161c88911376ab26">DREQ_PIO2_RX3</a> = 23
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a4b8b13f940414660401a7b334d85b64b">DREQ_SPI0_TX</a> = 24
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a46641088908dd355dc82971e7c7fbd35">DREQ_SPI0_RX</a> = 25
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a01d244742e157d2d2fb8e55b5fd6d81b">DREQ_SPI1_TX</a> = 26
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a04665a3e6a5c58a6cbf2d0fe1503cf00">DREQ_SPI1_RX</a> = 27
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a80ecb62e37f0c5af2780b93d4995326d">DREQ_UART0_TX</a> = 28
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a4812587fa3aa4cfd7ea0d91e20246b95">DREQ_UART0_RX</a> = 29
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aa64110e7f89692b9c789275b4d8b04c0">DREQ_UART1_TX</a> = 30
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ae5c7e2a566983a1148113e2987e059d5">DREQ_UART1_RX</a> = 31
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a2a861c9dcce9e158ace7bc5d547ebde1">DREQ_PWM_WRAP0</a> = 32
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a1504bdb2bd8aaa535903ea11aa2c2994">DREQ_PWM_WRAP1</a> = 33
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014acb766e3b38daca5c8cd35459d835d7a2">DREQ_PWM_WRAP2</a> = 34
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a017ebaacb45d90c4f20db2d5edded874">DREQ_PWM_WRAP3</a> = 35
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a5fdd41bb900549d6ff26772cc9fd507a">DREQ_PWM_WRAP4</a> = 36
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aced239695d7bf65c41827e1eb6cbc04a">DREQ_PWM_WRAP5</a> = 37
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014add0e022489d6ad4f835a97c6e354c15b">DREQ_PWM_WRAP6</a> = 38
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014adafe5a7f2f401a496e842c7a2c95dac5">DREQ_PWM_WRAP7</a> = 39
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a4ab337ff0746f2d9d432020658a478af">DREQ_PWM_WRAP8</a> = 40
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a8d7bd836d3ba015fc800e227b6408f73">DREQ_PWM_WRAP9</a> = 41
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ad17feaa0e6a99ccf14b5d7285ab363d1">DREQ_PWM_WRAP10</a> = 42
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a14ba987e523bd38f813f93322d053a4c">DREQ_PWM_WRAP11</a> = 43
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ab51c1095a1fec8ad39050cf49fd01835">DREQ_I2C0_TX</a> = 44
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a675d15a4afa861045235a441d46d0580">DREQ_I2C0_RX</a> = 45
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a74c786868da56dbb18b7da2c7748568f">DREQ_I2C1_TX</a> = 46
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a0b5156eb2381872ddc1837d83de16b8b">DREQ_I2C1_RX</a> = 47
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a5f3aedb5ef1de25b99afcde8742b4590">DREQ_ADC</a> = 48
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014aedbcc51f819f4c85c3ab8f51b654ebdc">DREQ_XIP_STREAM</a> = 49
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a79533c8a78e8f62f1f564954a755e02a">DREQ_XIP_QMITX</a> = 50
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a35519b1f622ee38560ffd2dfa1571c9b">DREQ_XIP_QMIRX</a> = 51
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a71865f5a1fc034131dfb351d2c830c03">DREQ_HSTX</a> = 52
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a1ef0656e59fedc445052acc548cce490">DREQ_CORESIGHT</a> = 53
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a7a5f3a4ca267d2cd53c43779fb5494ba">DREQ_SHA256</a> = 54
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a49bb6d90479edbff257068afd1a5bfe1">DREQ_DMA_TIMER0</a> = 59
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a11c9291490c2ddf45df69f45a2f83dcf">DREQ_DMA_TIMER1</a> = 60
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014abb60a9d9038192f9db081b51b9c23f65">DREQ_DMA_TIMER2</a> = 61
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014a86d08425822a129c3eaa1479e920c67c">DREQ_DMA_TIMER3</a> = 62
, <a class="el" href="group__hardware__dma.html#gga6f0a19defc495cfa6078364122266014ae683f0bb3ee8b854fe4cea850cf9d4c8">DREQ_FORCE</a> = 63
, <br />
&#160;&#160;<b>DREQ_COUNT</b>
<br />
 }</td></tr>
<tr class="memdesc:ga6f0a19defc495cfa6078364122266014"><td class="mdescLeft">&#160;</td><td class="mdescRight">DREQ numbers for DMA pacing on RP2350 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>)  <a href="group__hardware__dma.html#ga6f0a19defc495cfa6078364122266014">More...</a><br /></td></tr>
<tr class="separator:ga6f0a19defc495cfa6078364122266014"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga864c3313155ab20116b62a64bf78df6d"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga864c3313155ab20116b62a64bf78df6d">dreq_num_rp2040</a> { <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dad7529b7e45af2d7eab4b740ff15b49d8">DREQ_PIO0_TX0</a> = 0
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dac5fedec084064e1d9ff9c6a382c1ccf8">DREQ_PIO0_TX1</a> = 1
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6daa2e360dbf123d634d08e5fae27aa29e5">DREQ_PIO0_TX2</a> = 2
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da156b1b999c6b2dd877545c8c79060a30">DREQ_PIO0_TX3</a> = 3
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dac4bc12d74b758a7b39c1977c401e2fe1">DREQ_PIO0_RX0</a> = 4
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da19b55b49bb618eed839edccba14c0d8f">DREQ_PIO0_RX1</a> = 5
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da967d6b5eb2d3e06113b2b1606ef2af2c">DREQ_PIO0_RX2</a> = 6
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da10f8705467782c859f05f82aa3c3c9f5">DREQ_PIO0_RX3</a> = 7
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da3c22f2c9eb4a49654bba70dbc99bc893">DREQ_PIO1_TX0</a> = 8
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da37f1bb39c3aa38a753df88e7e6c57feb">DREQ_PIO1_TX1</a> = 9
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da13d7cb74708595298d788ba0ce25f6a0">DREQ_PIO1_TX2</a> = 10
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6daaa5859ea1daaf5f0760fb4dea23116c3">DREQ_PIO1_TX3</a> = 11
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da833bfa99e8b74de9bfc1872958a742e3">DREQ_PIO1_RX0</a> = 12
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da8da9c5655eb51f2fb8a33b16827796a9">DREQ_PIO1_RX1</a> = 13
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da0198dfe2da7237817e780a483144df8f">DREQ_PIO1_RX2</a> = 14
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dab093d84a1df12a37ab6e9d62ee1f6d57">DREQ_PIO1_RX3</a> = 15
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da4b8b13f940414660401a7b334d85b64b">DREQ_SPI0_TX</a> = 16
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da46641088908dd355dc82971e7c7fbd35">DREQ_SPI0_RX</a> = 17
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da01d244742e157d2d2fb8e55b5fd6d81b">DREQ_SPI1_TX</a> = 18
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da04665a3e6a5c58a6cbf2d0fe1503cf00">DREQ_SPI1_RX</a> = 19
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da80ecb62e37f0c5af2780b93d4995326d">DREQ_UART0_TX</a> = 20
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da4812587fa3aa4cfd7ea0d91e20246b95">DREQ_UART0_RX</a> = 21
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6daa64110e7f89692b9c789275b4d8b04c0">DREQ_UART1_TX</a> = 22
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dae5c7e2a566983a1148113e2987e059d5">DREQ_UART1_RX</a> = 23
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da2a861c9dcce9e158ace7bc5d547ebde1">DREQ_PWM_WRAP0</a> = 24
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da1504bdb2bd8aaa535903ea11aa2c2994">DREQ_PWM_WRAP1</a> = 25
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dacb766e3b38daca5c8cd35459d835d7a2">DREQ_PWM_WRAP2</a> = 26
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da017ebaacb45d90c4f20db2d5edded874">DREQ_PWM_WRAP3</a> = 27
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da5fdd41bb900549d6ff26772cc9fd507a">DREQ_PWM_WRAP4</a> = 28
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6daced239695d7bf65c41827e1eb6cbc04a">DREQ_PWM_WRAP5</a> = 29
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dadd0e022489d6ad4f835a97c6e354c15b">DREQ_PWM_WRAP6</a> = 30
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dadafe5a7f2f401a496e842c7a2c95dac5">DREQ_PWM_WRAP7</a> = 31
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dab51c1095a1fec8ad39050cf49fd01835">DREQ_I2C0_TX</a> = 32
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da675d15a4afa861045235a441d46d0580">DREQ_I2C0_RX</a> = 33
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da74c786868da56dbb18b7da2c7748568f">DREQ_I2C1_TX</a> = 34
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da0b5156eb2381872ddc1837d83de16b8b">DREQ_I2C1_RX</a> = 35
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da5f3aedb5ef1de25b99afcde8742b4590">DREQ_ADC</a> = 36
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6daedbcc51f819f4c85c3ab8f51b654ebdc">DREQ_XIP_STREAM</a> = 37
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dabaf536bfba84db157116952ae4a5d466">DREQ_XIP_SSITX</a> = 38
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da74f7500adc3af744bfe564b1c90aba0a">DREQ_XIP_SSIRX</a> = 39
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da49bb6d90479edbff257068afd1a5bfe1">DREQ_DMA_TIMER0</a> = 59
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da11c9291490c2ddf45df69f45a2f83dcf">DREQ_DMA_TIMER1</a> = 60
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dabb60a9d9038192f9db081b51b9c23f65">DREQ_DMA_TIMER2</a> = 61
, <a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6da86d08425822a129c3eaa1479e920c67c">DREQ_DMA_TIMER3</a> = 62
, <br />
&#160;&#160;<a class="el" href="group__hardware__dma.html#gga864c3313155ab20116b62a64bf78df6dae683f0bb3ee8b854fe4cea850cf9d4c8">DREQ_FORCE</a> = 63
, <b>DREQ_COUNT</b>
<br />
 }</td></tr>
<tr class="memdesc:ga864c3313155ab20116b62a64bf78df6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">DREQ numbers for DMA pacing on RP2040 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>)  <a href="group__hardware__dma.html#ga864c3313155ab20116b62a64bf78df6d">More...</a><br /></td></tr>
<tr class="separator:ga864c3313155ab20116b62a64bf78df6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaccecdff367b06a019373e9a55d4f3e01"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">dma_channel_transfer_size</a> { <a class="el" href="group__hardware__dma.html#ggaccecdff367b06a019373e9a55d4f3e01abd7d246406a2ebe4dd49780db176dc3c">DMA_SIZE_8</a> = 0
, <a class="el" href="group__hardware__dma.html#ggaccecdff367b06a019373e9a55d4f3e01a2e343022ac046b6b67bb99eebc833cfc">DMA_SIZE_16</a> = 1
, <a class="el" href="group__hardware__dma.html#ggaccecdff367b06a019373e9a55d4f3e01abf1030013f4ad74b45d25cd9a07b6296">DMA_SIZE_32</a> = 2
 }</td></tr>
<tr class="memdesc:gaccecdff367b06a019373e9a55d4f3e01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enumeration of available DMA channel transfer sizes.  <a href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">More...</a><br /></td></tr>
<tr class="separator:gaccecdff367b06a019373e9a55d4f3e01"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gae1b3c916746b3d2052f21b7dda34aab9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gae1b3c916746b3d2052f21b7dda34aab9">dma_channel_claim</a> (uint channel)</td></tr>
<tr class="memdesc:gae1b3c916746b3d2052f21b7dda34aab9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma channel as used.  <a href="group__hardware__dma.html#gae1b3c916746b3d2052f21b7dda34aab9">More...</a><br /></td></tr>
<tr class="separator:gae1b3c916746b3d2052f21b7dda34aab9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa430bc53dc2b36d727ad976f6348c8b3">dma_claim_mask</a> (uint32_t channel_mask)</td></tr>
<tr class="memdesc:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark multiple dma channels as used.  <a href="group__hardware__dma.html#gaa430bc53dc2b36d727ad976f6348c8b3">More...</a><br /></td></tr>
<tr class="separator:gaa430bc53dc2b36d727ad976f6348c8b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac50200739b88a2fd52316f4150533035"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">dma_channel_unclaim</a> (uint channel)</td></tr>
<tr class="memdesc:gac50200739b88a2fd52316f4150533035"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma channel as no longer used.  <a href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">More...</a><br /></td></tr>
<tr class="separator:gac50200739b88a2fd52316f4150533035"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0211681c906ebe4971d0cded8e98f8b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga0211681c906ebe4971d0cded8e98f8b5">dma_unclaim_mask</a> (uint32_t channel_mask)</td></tr>
<tr class="memdesc:ga0211681c906ebe4971d0cded8e98f8b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark multiple dma channels as no longer used.  <a href="group__hardware__dma.html#ga0211681c906ebe4971d0cded8e98f8b5">More...</a><br /></td></tr>
<tr class="separator:ga0211681c906ebe4971d0cded8e98f8b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b0a6680795b9c9ed787362a8a057206"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4b0a6680795b9c9ed787362a8a057206">dma_claim_unused_channel</a> (bool required)</td></tr>
<tr class="memdesc:ga4b0a6680795b9c9ed787362a8a057206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim a free dma channel.  <a href="group__hardware__dma.html#ga4b0a6680795b9c9ed787362a8a057206">More...</a><br /></td></tr>
<tr class="separator:ga4b0a6680795b9c9ed787362a8a057206"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9aadb81f53b979bde1c1a81164d1eff2">dma_channel_is_claimed</a> (uint channel)</td></tr>
<tr class="memdesc:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a dma channel is claimed.  <a href="group__hardware__dma.html#ga9aadb81f53b979bde1c1a81164d1eff2">More...</a><br /></td></tr>
<tr class="separator:ga9aadb81f53b979bde1c1a81164d1eff2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7449b659efb178a408f42f7f8f7b02f9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga7449b659efb178a408f42f7f8f7b02f9">dma_channel_set_config</a> (uint channel, const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config, bool trigger)</td></tr>
<tr class="memdesc:ga7449b659efb178a408f42f7f8f7b02f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set a channel configuration.  <a href="group__hardware__dma.html#ga7449b659efb178a408f42f7f8f7b02f9">More...</a><br /></td></tr>
<tr class="separator:ga7449b659efb178a408f42f7f8f7b02f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf6f6ffe56fa42dcb105032f110589ae"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gabf6f6ffe56fa42dcb105032f110589ae">dma_channel_set_read_addr</a> (uint channel, const volatile void *read_addr, bool trigger)</td></tr>
<tr class="memdesc:gabf6f6ffe56fa42dcb105032f110589ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the DMA initial read address.  <a href="group__hardware__dma.html#gabf6f6ffe56fa42dcb105032f110589ae">More...</a><br /></td></tr>
<tr class="separator:gabf6f6ffe56fa42dcb105032f110589ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf0156609fe51c07d07118b2aeb4e9ae6">dma_channel_set_write_addr</a> (uint channel, volatile void *write_addr, bool trigger)</td></tr>
<tr class="memdesc:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the DMA initial write address.  <a href="group__hardware__dma.html#gaf0156609fe51c07d07118b2aeb4e9ae6">More...</a><br /></td></tr>
<tr class="separator:gaf0156609fe51c07d07118b2aeb4e9ae6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16c0e08eda636f13053d8c8b0f81e821"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga16c0e08eda636f13053d8c8b0f81e821">dma_channel_set_trans_count</a> (uint channel, uint32_t trans_count, bool trigger)</td></tr>
<tr class="memdesc:ga16c0e08eda636f13053d8c8b0f81e821"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the number of bus transfers the channel will do.  <a href="group__hardware__dma.html#ga16c0e08eda636f13053d8c8b0f81e821">More...</a><br /></td></tr>
<tr class="separator:ga16c0e08eda636f13053d8c8b0f81e821"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga971d077ac39b2d7f7c6b45e2ddc5d190">dma_channel_configure</a> (uint channel, const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *config, volatile void *write_addr, const volatile void *read_addr, uint transfer_count, bool trigger)</td></tr>
<tr class="memdesc:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure all DMA parameters and optionally start transfer.  <a href="group__hardware__dma.html#ga971d077ac39b2d7f7c6b45e2ddc5d190">More...</a><br /></td></tr>
<tr class="separator:ga971d077ac39b2d7f7c6b45e2ddc5d190"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf64c461a405a8114591105d9dc53575"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gabf64c461a405a8114591105d9dc53575">dma_channel_transfer_from_buffer_now</a> (uint channel, const volatile void *read_addr, uint32_t transfer_count)</td></tr>
<tr class="memdesc:gabf64c461a405a8114591105d9dc53575"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a DMA transfer from a buffer immediately.  <a href="group__hardware__dma.html#gabf64c461a405a8114591105d9dc53575">More...</a><br /></td></tr>
<tr class="separator:gabf64c461a405a8114591105d9dc53575"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9110135d8161fc268d87dfb040d0f854"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9110135d8161fc268d87dfb040d0f854">dma_channel_transfer_to_buffer_now</a> (uint channel, volatile void *write_addr, uint32_t transfer_count)</td></tr>
<tr class="memdesc:ga9110135d8161fc268d87dfb040d0f854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a DMA transfer to a buffer immediately.  <a href="group__hardware__dma.html#ga9110135d8161fc268d87dfb040d0f854">More...</a><br /></td></tr>
<tr class="separator:ga9110135d8161fc268d87dfb040d0f854"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6407f7763b533c98e23f65e35c5e48ee"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6407f7763b533c98e23f65e35c5e48ee">dma_start_channel_mask</a> (uint32_t chan_mask)</td></tr>
<tr class="memdesc:ga6407f7763b533c98e23f65e35c5e48ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start one or more channels simultaneously.  <a href="group__hardware__dma.html#ga6407f7763b533c98e23f65e35c5e48ee">More...</a><br /></td></tr>
<tr class="separator:ga6407f7763b533c98e23f65e35c5e48ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga355720e02713c7324b540efc6f632366"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga355720e02713c7324b540efc6f632366">dma_channel_start</a> (uint channel)</td></tr>
<tr class="memdesc:ga355720e02713c7324b540efc6f632366"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a single DMA channel.  <a href="group__hardware__dma.html#ga355720e02713c7324b540efc6f632366">More...</a><br /></td></tr>
<tr class="separator:ga355720e02713c7324b540efc6f632366"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga735e7c6c136c078689ead70790f4edb2"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">dma_channel_abort</a> (uint channel)</td></tr>
<tr class="memdesc:ga735e7c6c136c078689ead70790f4edb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop a DMA transfer.  <a href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">More...</a><br /></td></tr>
<tr class="separator:ga735e7c6c136c078689ead70790f4edb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf60011d46676c87b7139f37188eaa4b9"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">dma_channel_set_irq0_enabled</a> (uint channel, bool enabled)</td></tr>
<tr class="memdesc:gaf60011d46676c87b7139f37188eaa4b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel's interrupt via DMA_IRQ_0.  <a href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">More...</a><br /></td></tr>
<tr class="separator:gaf60011d46676c87b7139f37188eaa4b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gad5c1ac22e0b4d9b831912fbb95460be4">dma_set_irq0_channel_mask_enabled</a> (uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupts via DMA_IRQ_0.  <a href="group__hardware__dma.html#gad5c1ac22e0b4d9b831912fbb95460be4">More...</a><br /></td></tr>
<tr class="separator:gad5c1ac22e0b4d9b831912fbb95460be4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4f9415c8f77ff0bacedf5a138a88d76f">dma_channel_set_irq1_enabled</a> (uint channel, bool enabled)</td></tr>
<tr class="memdesc:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel's interrupt via DMA_IRQ_1.  <a href="group__hardware__dma.html#ga4f9415c8f77ff0bacedf5a138a88d76f">More...</a><br /></td></tr>
<tr class="separator:ga4f9415c8f77ff0bacedf5a138a88d76f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaaa20edc55a2cc4977d24bdb487a22aa5">dma_set_irq1_channel_mask_enabled</a> (uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupts via DMA_IRQ_1.  <a href="group__hardware__dma.html#gaaa20edc55a2cc4977d24bdb487a22aa5">More...</a><br /></td></tr>
<tr class="separator:gaaa20edc55a2cc4977d24bdb487a22aa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6fefe19fa5539580315de923e42131d3"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga6fefe19fa5539580315de923e42131d3">dma_irqn_set_channel_enabled</a> (uint irq_index, uint channel, bool enabled)</td></tr>
<tr class="memdesc:ga6fefe19fa5539580315de923e42131d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable single DMA channel interrupt on either DMA_IRQ_0 or DMA_IRQ_1.  <a href="group__hardware__dma.html#ga6fefe19fa5539580315de923e42131d3">More...</a><br /></td></tr>
<tr class="separator:ga6fefe19fa5539580315de923e42131d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga720f2335e93b0e53e28959566ca18f3e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga720f2335e93b0e53e28959566ca18f3e">dma_irqn_set_channel_mask_enabled</a> (uint irq_index, uint32_t channel_mask, bool enabled)</td></tr>
<tr class="memdesc:ga720f2335e93b0e53e28959566ca18f3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable multiple DMA channels' interrupt via either DMA_IRQ_0 or DMA_IRQ_1.  <a href="group__hardware__dma.html#ga720f2335e93b0e53e28959566ca18f3e">More...</a><br /></td></tr>
<tr class="separator:ga720f2335e93b0e53e28959566ca18f3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa86e892c47b054d3c22fa39c001c7c23"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa86e892c47b054d3c22fa39c001c7c23">dma_channel_get_irq0_status</a> (uint channel)</td></tr>
<tr class="memdesc:gaa86e892c47b054d3c22fa39c001c7c23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_0.  <a href="group__hardware__dma.html#gaa86e892c47b054d3c22fa39c001c7c23">More...</a><br /></td></tr>
<tr class="separator:gaa86e892c47b054d3c22fa39c001c7c23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf61d25264e49058d20fb607dc1c40981"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaf61d25264e49058d20fb607dc1c40981">dma_channel_get_irq1_status</a> (uint channel)</td></tr>
<tr class="memdesc:gaf61d25264e49058d20fb607dc1c40981"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_1.  <a href="group__hardware__dma.html#gaf61d25264e49058d20fb607dc1c40981">More...</a><br /></td></tr>
<tr class="separator:gaf61d25264e49058d20fb607dc1c40981"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43f1fe10d5eb241788f72ad11599fc11"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga43f1fe10d5eb241788f72ad11599fc11">dma_irqn_get_channel_status</a> (uint irq_index, uint channel)</td></tr>
<tr class="memdesc:ga43f1fe10d5eb241788f72ad11599fc11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a particular channel is a cause of DMA_IRQ_N.  <a href="group__hardware__dma.html#ga43f1fe10d5eb241788f72ad11599fc11">More...</a><br /></td></tr>
<tr class="separator:ga43f1fe10d5eb241788f72ad11599fc11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafefe50f20c44bcfa7f729829a5d494f4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">dma_channel_acknowledge_irq0</a> (uint channel)</td></tr>
<tr class="memdesc:gafefe50f20c44bcfa7f729829a5d494f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_0.  <a href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">More...</a><br /></td></tr>
<tr class="separator:gafefe50f20c44bcfa7f729829a5d494f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga4d4b5d461ff09bb6e4e2a05df3b7c75c">dma_channel_acknowledge_irq1</a> (uint channel)</td></tr>
<tr class="memdesc:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_1.  <a href="group__hardware__dma.html#ga4d4b5d461ff09bb6e4e2a05df3b7c75c">More...</a><br /></td></tr>
<tr class="separator:ga4d4b5d461ff09bb6e4e2a05df3b7c75c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0e8e022fbe67b80c16912254526fada"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gad0e8e022fbe67b80c16912254526fada">dma_irqn_acknowledge_channel</a> (uint irq_index, uint channel)</td></tr>
<tr class="memdesc:gad0e8e022fbe67b80c16912254526fada"><td class="mdescLeft">&#160;</td><td class="mdescRight">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_N.  <a href="group__hardware__dma.html#gad0e8e022fbe67b80c16912254526fada">More...</a><br /></td></tr>
<tr class="separator:gad0e8e022fbe67b80c16912254526fada"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbb5020a529ed6d39a11da88a6f313f2"><td class="memItemLeft" align="right" valign="top">static bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gafbb5020a529ed6d39a11da88a6f313f2">dma_channel_is_busy</a> (uint channel)</td></tr>
<tr class="memdesc:gafbb5020a529ed6d39a11da88a6f313f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check if DMA channel is busy.  <a href="group__hardware__dma.html#gafbb5020a529ed6d39a11da88a6f313f2">More...</a><br /></td></tr>
<tr class="separator:gafbb5020a529ed6d39a11da88a6f313f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab57c68850b8e6ed1623de75ad611db62"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gab57c68850b8e6ed1623de75ad611db62">dma_channel_wait_for_finish_blocking</a> (uint channel)</td></tr>
<tr class="memdesc:gab57c68850b8e6ed1623de75ad611db62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for a DMA channel transfer to complete.  <a href="group__hardware__dma.html#gab57c68850b8e6ed1623de75ad611db62">More...</a><br /></td></tr>
<tr class="separator:gab57c68850b8e6ed1623de75ad611db62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga078c3c80d5637850ec64e8f5ad5ce0c2">dma_sniffer_enable</a> (uint channel, uint mode, bool force_channel_enable)</td></tr>
<tr class="memdesc:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the DMA sniffing targeting the specified channel.  <a href="group__hardware__dma.html#ga078c3c80d5637850ec64e8f5ad5ce0c2">More...</a><br /></td></tr>
<tr class="separator:ga078c3c80d5637850ec64e8f5ad5ce0c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac3b250d97550527a584de9d3f770acea"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gac3b250d97550527a584de9d3f770acea">dma_sniffer_set_byte_swap_enabled</a> (bool swap)</td></tr>
<tr class="memdesc:gac3b250d97550527a584de9d3f770acea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer byte swap function.  <a href="group__hardware__dma.html#gac3b250d97550527a584de9d3f770acea">More...</a><br /></td></tr>
<tr class="separator:gac3b250d97550527a584de9d3f770acea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga1366c938a8322aa1eb8e703b1f22d6af">dma_sniffer_set_output_invert_enabled</a> (bool invert)</td></tr>
<tr class="memdesc:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer output invert function.  <a href="group__hardware__dma.html#ga1366c938a8322aa1eb8e703b1f22d6af">More...</a><br /></td></tr>
<tr class="separator:ga1366c938a8322aa1eb8e703b1f22d6af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gaa2c5775bdb86d63a4866b2f6f5b41143">dma_sniffer_set_output_reverse_enabled</a> (bool reverse)</td></tr>
<tr class="memdesc:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the Sniffer output bit reversal function.  <a href="group__hardware__dma.html#gaa2c5775bdb86d63a4866b2f6f5b41143">More...</a><br /></td></tr>
<tr class="separator:gaa2c5775bdb86d63a4866b2f6f5b41143"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="memItemLeft" align="right" valign="top"><a id="ga9c9bcbe60b4c6102cae3e616476c4735" name="ga9c9bcbe60b4c6102cae3e616476c4735"></a>
static void&#160;</td><td class="memItemRight" valign="bottom"><b>dma_sniffer_disable</b> (void)</td></tr>
<tr class="memdesc:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the DMA sniffer. <br /></td></tr>
<tr class="separator:ga9c9bcbe60b4c6102cae3e616476c4735"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacab1f8010c206dfc77b81cb16902a4e4"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#gacab1f8010c206dfc77b81cb16902a4e4">dma_sniffer_set_data_accumulator</a> (uint32_t seed_value)</td></tr>
<tr class="memdesc:gacab1f8010c206dfc77b81cb16902a4e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the sniffer's data accumulator with initial value.  <a href="group__hardware__dma.html#gacab1f8010c206dfc77b81cb16902a4e4">More...</a><br /></td></tr>
<tr class="separator:gacab1f8010c206dfc77b81cb16902a4e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3527c2567c9253ca602b91d30ae49d1e"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga3527c2567c9253ca602b91d30ae49d1e">dma_sniffer_get_data_accumulator</a> (void)</td></tr>
<tr class="memdesc:ga3527c2567c9253ca602b91d30ae49d1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the sniffer's data accumulator value.  <a href="group__hardware__dma.html#ga3527c2567c9253ca602b91d30ae49d1e">More...</a><br /></td></tr>
<tr class="separator:ga3527c2567c9253ca602b91d30ae49d1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga08fc90c0064510e7a0a2cf8d1cd187bc">dma_timer_claim</a> (uint timer)</td></tr>
<tr class="memdesc:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma timer as used.  <a href="group__hardware__dma.html#ga08fc90c0064510e7a0a2cf8d1cd187bc">More...</a><br /></td></tr>
<tr class="separator:ga08fc90c0064510e7a0a2cf8d1cd187bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga890490576d8806b8933aad0e34d09c5e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga890490576d8806b8933aad0e34d09c5e">dma_timer_unclaim</a> (uint timer)</td></tr>
<tr class="memdesc:ga890490576d8806b8933aad0e34d09c5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark a dma timer as no longer used.  <a href="group__hardware__dma.html#ga890490576d8806b8933aad0e34d09c5e">More...</a><br /></td></tr>
<tr class="separator:ga890490576d8806b8933aad0e34d09c5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f218b6acd97e09430afbb74172bd570"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga2f218b6acd97e09430afbb74172bd570">dma_claim_unused_timer</a> (bool required)</td></tr>
<tr class="memdesc:ga2f218b6acd97e09430afbb74172bd570"><td class="mdescLeft">&#160;</td><td class="mdescRight">Claim a free dma timer.  <a href="group__hardware__dma.html#ga2f218b6acd97e09430afbb74172bd570">More...</a><br /></td></tr>
<tr class="separator:ga2f218b6acd97e09430afbb74172bd570"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b45bfe6985f8c0894d34876eedc3090"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga9b45bfe6985f8c0894d34876eedc3090">dma_timer_is_claimed</a> (uint timer)</td></tr>
<tr class="memdesc:ga9b45bfe6985f8c0894d34876eedc3090"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a dma timer is claimed.  <a href="group__hardware__dma.html#ga9b45bfe6985f8c0894d34876eedc3090">More...</a><br /></td></tr>
<tr class="separator:ga9b45bfe6985f8c0894d34876eedc3090"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58f9c3cb606759e4620c82583f833dc8"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga58f9c3cb606759e4620c82583f833dc8">dma_timer_set_fraction</a> (uint timer, uint16_t numerator, uint16_t denominator)</td></tr>
<tr class="memdesc:ga58f9c3cb606759e4620c82583f833dc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the multiplier for the given DMA timer.  <a href="group__hardware__dma.html#ga58f9c3cb606759e4620c82583f833dc8">More...</a><br /></td></tr>
<tr class="separator:ga58f9c3cb606759e4620c82583f833dc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75ef6881795fd1760fe813f9e0a79223"><td class="memItemLeft" align="right" valign="top">static uint&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga75ef6881795fd1760fe813f9e0a79223">dma_get_timer_dreq</a> (uint timer_num)</td></tr>
<tr class="memdesc:ga75ef6881795fd1760fe813f9e0a79223"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return the DREQ number for a given DMA timer.  <a href="group__hardware__dma.html#ga75ef6881795fd1760fe813f9e0a79223">More...</a><br /></td></tr>
<tr class="separator:ga75ef6881795fd1760fe813f9e0a79223"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5da1507764272564a75939e2cf38fa9a"><td class="memItemLeft" align="right" valign="top">static int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga5da1507764272564a75939e2cf38fa9a">dma_get_irq_num</a> (uint irq_index)</td></tr>
<tr class="memdesc:ga5da1507764272564a75939e2cf38fa9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Return DMA_IRQ_&lt;irqn&gt;  <a href="group__hardware__dma.html#ga5da1507764272564a75939e2cf38fa9a">More...</a><br /></td></tr>
<tr class="separator:ga5da1507764272564a75939e2cf38fa9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga655130988c1045bdf711135698adf321"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">dma_channel_cleanup</a> (uint channel)</td></tr>
<tr class="memdesc:ga655130988c1045bdf711135698adf321"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs DMA channel cleanup after use.  <a href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">More...</a><br /></td></tr>
<tr class="separator:ga655130988c1045bdf711135698adf321"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<p >DMA Controller API. </p>
<p >The RP-series microcontroller Direct Memory Access (DMA) master performs bulk data transfers on a processor’s behalf. This leaves processors free to attend to other tasks, or enter low-power sleep states. The data throughput of the DMA is also significantly higher than one of RP-series microcontroller’s processors.</p>
<p >The DMA can perform one read access and one write access, up to 32 bits in size, every clock cycle. There are 12 independent channels, which each supervise a sequence of bus transfers, usually in one of the following scenarios:</p>
<ul>
<li>Memory to peripheral</li>
<li>Peripheral to memory</li>
<li>Memory to memory </li>
</ul>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="ga6c72cc3aafb409371f60fefd0463e289" name="ga6c72cc3aafb409371f60fefd0463e289"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6c72cc3aafb409371f60fefd0463e289">&#9670;&nbsp;</a></span>DMA_IRQ_NUM</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define DMA_IRQ_NUM</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">irq_index</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Returns the <a class="el" href="group__hardware__irq.html#gaf30862f51b5994ffd5863176a185d137">irq_num_t</a> for the nth DMA interrupt. </p>
<p >Note this macro is intended to resolve at compile time, and does no parameter checking </p>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a id="gaccecdff367b06a019373e9a55d4f3e01" name="gaccecdff367b06a019373e9a55d4f3e01"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaccecdff367b06a019373e9a55d4f3e01">&#9670;&nbsp;</a></span>dma_channel_transfer_size</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__hardware__dma.html#gaccecdff367b06a019373e9a55d4f3e01">dma_channel_transfer_size</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Enumeration of available DMA channel transfer sizes. </p>
<p >Names indicate the number of bits. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggaccecdff367b06a019373e9a55d4f3e01abd7d246406a2ebe4dd49780db176dc3c" name="ggaccecdff367b06a019373e9a55d4f3e01abd7d246406a2ebe4dd49780db176dc3c"></a>DMA_SIZE_8&#160;</td><td class="fielddoc"><p >Byte transfer (8 bits) </p>
</td></tr>
<tr><td class="fieldname"><a id="ggaccecdff367b06a019373e9a55d4f3e01a2e343022ac046b6b67bb99eebc833cfc" name="ggaccecdff367b06a019373e9a55d4f3e01a2e343022ac046b6b67bb99eebc833cfc"></a>DMA_SIZE_16&#160;</td><td class="fielddoc"><p >Half word transfer (16 bits) </p>
</td></tr>
<tr><td class="fieldname"><a id="ggaccecdff367b06a019373e9a55d4f3e01abf1030013f4ad74b45d25cd9a07b6296" name="ggaccecdff367b06a019373e9a55d4f3e01abf1030013f4ad74b45d25cd9a07b6296"></a>DMA_SIZE_32&#160;</td><td class="fielddoc"><p >Word transfer (32 bits) </p>
</td></tr>
</table>

</div>
</div>
<a id="ga864c3313155ab20116b62a64bf78df6d" name="ga864c3313155ab20116b62a64bf78df6d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga864c3313155ab20116b62a64bf78df6d">&#9670;&nbsp;</a></span>dreq_num_rp2040</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__hardware__dma.html#ga864c3313155ab20116b62a64bf78df6d">dreq_num_rp2040</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DREQ numbers for DMA pacing on RP2040 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>) </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dad7529b7e45af2d7eab4b740ff15b49d8" name="gga864c3313155ab20116b62a64bf78df6dad7529b7e45af2d7eab4b740ff15b49d8"></a>DREQ_PIO0_TX0&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dac5fedec084064e1d9ff9c6a382c1ccf8" name="gga864c3313155ab20116b62a64bf78df6dac5fedec084064e1d9ff9c6a382c1ccf8"></a>DREQ_PIO0_TX1&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6daa2e360dbf123d634d08e5fae27aa29e5" name="gga864c3313155ab20116b62a64bf78df6daa2e360dbf123d634d08e5fae27aa29e5"></a>DREQ_PIO0_TX2&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da156b1b999c6b2dd877545c8c79060a30" name="gga864c3313155ab20116b62a64bf78df6da156b1b999c6b2dd877545c8c79060a30"></a>DREQ_PIO0_TX3&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dac4bc12d74b758a7b39c1977c401e2fe1" name="gga864c3313155ab20116b62a64bf78df6dac4bc12d74b758a7b39c1977c401e2fe1"></a>DREQ_PIO0_RX0&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da19b55b49bb618eed839edccba14c0d8f" name="gga864c3313155ab20116b62a64bf78df6da19b55b49bb618eed839edccba14c0d8f"></a>DREQ_PIO0_RX1&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da967d6b5eb2d3e06113b2b1606ef2af2c" name="gga864c3313155ab20116b62a64bf78df6da967d6b5eb2d3e06113b2b1606ef2af2c"></a>DREQ_PIO0_RX2&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da10f8705467782c859f05f82aa3c3c9f5" name="gga864c3313155ab20116b62a64bf78df6da10f8705467782c859f05f82aa3c3c9f5"></a>DREQ_PIO0_RX3&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da3c22f2c9eb4a49654bba70dbc99bc893" name="gga864c3313155ab20116b62a64bf78df6da3c22f2c9eb4a49654bba70dbc99bc893"></a>DREQ_PIO1_TX0&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da37f1bb39c3aa38a753df88e7e6c57feb" name="gga864c3313155ab20116b62a64bf78df6da37f1bb39c3aa38a753df88e7e6c57feb"></a>DREQ_PIO1_TX1&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da13d7cb74708595298d788ba0ce25f6a0" name="gga864c3313155ab20116b62a64bf78df6da13d7cb74708595298d788ba0ce25f6a0"></a>DREQ_PIO1_TX2&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6daaa5859ea1daaf5f0760fb4dea23116c3" name="gga864c3313155ab20116b62a64bf78df6daaa5859ea1daaf5f0760fb4dea23116c3"></a>DREQ_PIO1_TX3&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da833bfa99e8b74de9bfc1872958a742e3" name="gga864c3313155ab20116b62a64bf78df6da833bfa99e8b74de9bfc1872958a742e3"></a>DREQ_PIO1_RX0&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da8da9c5655eb51f2fb8a33b16827796a9" name="gga864c3313155ab20116b62a64bf78df6da8da9c5655eb51f2fb8a33b16827796a9"></a>DREQ_PIO1_RX1&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da0198dfe2da7237817e780a483144df8f" name="gga864c3313155ab20116b62a64bf78df6da0198dfe2da7237817e780a483144df8f"></a>DREQ_PIO1_RX2&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dab093d84a1df12a37ab6e9d62ee1f6d57" name="gga864c3313155ab20116b62a64bf78df6dab093d84a1df12a37ab6e9d62ee1f6d57"></a>DREQ_PIO1_RX3&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da4b8b13f940414660401a7b334d85b64b" name="gga864c3313155ab20116b62a64bf78df6da4b8b13f940414660401a7b334d85b64b"></a>DREQ_SPI0_TX&#160;</td><td class="fielddoc"><p >Select SPI0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da46641088908dd355dc82971e7c7fbd35" name="gga864c3313155ab20116b62a64bf78df6da46641088908dd355dc82971e7c7fbd35"></a>DREQ_SPI0_RX&#160;</td><td class="fielddoc"><p >Select SPI0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da01d244742e157d2d2fb8e55b5fd6d81b" name="gga864c3313155ab20116b62a64bf78df6da01d244742e157d2d2fb8e55b5fd6d81b"></a>DREQ_SPI1_TX&#160;</td><td class="fielddoc"><p >Select SPI1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da04665a3e6a5c58a6cbf2d0fe1503cf00" name="gga864c3313155ab20116b62a64bf78df6da04665a3e6a5c58a6cbf2d0fe1503cf00"></a>DREQ_SPI1_RX&#160;</td><td class="fielddoc"><p >Select SPI1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da80ecb62e37f0c5af2780b93d4995326d" name="gga864c3313155ab20116b62a64bf78df6da80ecb62e37f0c5af2780b93d4995326d"></a>DREQ_UART0_TX&#160;</td><td class="fielddoc"><p >Select UART0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da4812587fa3aa4cfd7ea0d91e20246b95" name="gga864c3313155ab20116b62a64bf78df6da4812587fa3aa4cfd7ea0d91e20246b95"></a>DREQ_UART0_RX&#160;</td><td class="fielddoc"><p >Select UART0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6daa64110e7f89692b9c789275b4d8b04c0" name="gga864c3313155ab20116b62a64bf78df6daa64110e7f89692b9c789275b4d8b04c0"></a>DREQ_UART1_TX&#160;</td><td class="fielddoc"><p >Select UART1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dae5c7e2a566983a1148113e2987e059d5" name="gga864c3313155ab20116b62a64bf78df6dae5c7e2a566983a1148113e2987e059d5"></a>DREQ_UART1_RX&#160;</td><td class="fielddoc"><p >Select UART1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da2a861c9dcce9e158ace7bc5d547ebde1" name="gga864c3313155ab20116b62a64bf78df6da2a861c9dcce9e158ace7bc5d547ebde1"></a>DREQ_PWM_WRAP0&#160;</td><td class="fielddoc"><p >Select PWM Counter 0's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da1504bdb2bd8aaa535903ea11aa2c2994" name="gga864c3313155ab20116b62a64bf78df6da1504bdb2bd8aaa535903ea11aa2c2994"></a>DREQ_PWM_WRAP1&#160;</td><td class="fielddoc"><p >Select PWM Counter 1's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dacb766e3b38daca5c8cd35459d835d7a2" name="gga864c3313155ab20116b62a64bf78df6dacb766e3b38daca5c8cd35459d835d7a2"></a>DREQ_PWM_WRAP2&#160;</td><td class="fielddoc"><p >Select PWM Counter 2's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da017ebaacb45d90c4f20db2d5edded874" name="gga864c3313155ab20116b62a64bf78df6da017ebaacb45d90c4f20db2d5edded874"></a>DREQ_PWM_WRAP3&#160;</td><td class="fielddoc"><p >Select PWM Counter 3's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da5fdd41bb900549d6ff26772cc9fd507a" name="gga864c3313155ab20116b62a64bf78df6da5fdd41bb900549d6ff26772cc9fd507a"></a>DREQ_PWM_WRAP4&#160;</td><td class="fielddoc"><p >Select PWM Counter 4's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6daced239695d7bf65c41827e1eb6cbc04a" name="gga864c3313155ab20116b62a64bf78df6daced239695d7bf65c41827e1eb6cbc04a"></a>DREQ_PWM_WRAP5&#160;</td><td class="fielddoc"><p >Select PWM Counter 5's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dadd0e022489d6ad4f835a97c6e354c15b" name="gga864c3313155ab20116b62a64bf78df6dadd0e022489d6ad4f835a97c6e354c15b"></a>DREQ_PWM_WRAP6&#160;</td><td class="fielddoc"><p >Select PWM Counter 6's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dadafe5a7f2f401a496e842c7a2c95dac5" name="gga864c3313155ab20116b62a64bf78df6dadafe5a7f2f401a496e842c7a2c95dac5"></a>DREQ_PWM_WRAP7&#160;</td><td class="fielddoc"><p >Select PWM Counter 7's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dab51c1095a1fec8ad39050cf49fd01835" name="gga864c3313155ab20116b62a64bf78df6dab51c1095a1fec8ad39050cf49fd01835"></a>DREQ_I2C0_TX&#160;</td><td class="fielddoc"><p >Select I2C0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da675d15a4afa861045235a441d46d0580" name="gga864c3313155ab20116b62a64bf78df6da675d15a4afa861045235a441d46d0580"></a>DREQ_I2C0_RX&#160;</td><td class="fielddoc"><p >Select I2C0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da74c786868da56dbb18b7da2c7748568f" name="gga864c3313155ab20116b62a64bf78df6da74c786868da56dbb18b7da2c7748568f"></a>DREQ_I2C1_TX&#160;</td><td class="fielddoc"><p >Select I2C1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da0b5156eb2381872ddc1837d83de16b8b" name="gga864c3313155ab20116b62a64bf78df6da0b5156eb2381872ddc1837d83de16b8b"></a>DREQ_I2C1_RX&#160;</td><td class="fielddoc"><p >Select I2C1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da5f3aedb5ef1de25b99afcde8742b4590" name="gga864c3313155ab20116b62a64bf78df6da5f3aedb5ef1de25b99afcde8742b4590"></a>DREQ_ADC&#160;</td><td class="fielddoc"><p >Select the ADC as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6daedbcc51f819f4c85c3ab8f51b654ebdc" name="gga864c3313155ab20116b62a64bf78df6daedbcc51f819f4c85c3ab8f51b654ebdc"></a>DREQ_XIP_STREAM&#160;</td><td class="fielddoc"><p >Select the XIP Streaming FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dabaf536bfba84db157116952ae4a5d466" name="gga864c3313155ab20116b62a64bf78df6dabaf536bfba84db157116952ae4a5d466"></a>DREQ_XIP_SSITX&#160;</td><td class="fielddoc"><p >Select the XIP SSI TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da74f7500adc3af744bfe564b1c90aba0a" name="gga864c3313155ab20116b62a64bf78df6da74f7500adc3af744bfe564b1c90aba0a"></a>DREQ_XIP_SSIRX&#160;</td><td class="fielddoc"><p >Select the XIP SSI RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da49bb6d90479edbff257068afd1a5bfe1" name="gga864c3313155ab20116b62a64bf78df6da49bb6d90479edbff257068afd1a5bfe1"></a>DREQ_DMA_TIMER0&#160;</td><td class="fielddoc"><p >Select DMA_TIMER0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da11c9291490c2ddf45df69f45a2f83dcf" name="gga864c3313155ab20116b62a64bf78df6da11c9291490c2ddf45df69f45a2f83dcf"></a>DREQ_DMA_TIMER1&#160;</td><td class="fielddoc"><p >Select DMA_TIMER0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dabb60a9d9038192f9db081b51b9c23f65" name="gga864c3313155ab20116b62a64bf78df6dabb60a9d9038192f9db081b51b9c23f65"></a>DREQ_DMA_TIMER2&#160;</td><td class="fielddoc"><p >Select DMA_TIMER1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6da86d08425822a129c3eaa1479e920c67c" name="gga864c3313155ab20116b62a64bf78df6da86d08425822a129c3eaa1479e920c67c"></a>DREQ_DMA_TIMER3&#160;</td><td class="fielddoc"><p >Select DMA_TIMER3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga864c3313155ab20116b62a64bf78df6dae683f0bb3ee8b854fe4cea850cf9d4c8" name="gga864c3313155ab20116b62a64bf78df6dae683f0bb3ee8b854fe4cea850cf9d4c8"></a>DREQ_FORCE&#160;</td><td class="fielddoc"><p >Select FORCE as DREQ. </p>
</td></tr>
</table>

</div>
</div>
<a id="ga6f0a19defc495cfa6078364122266014" name="ga6f0a19defc495cfa6078364122266014"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6f0a19defc495cfa6078364122266014">&#9670;&nbsp;</a></span>dreq_num_rp2350</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__hardware__dma.html#ga6f0a19defc495cfa6078364122266014">dreq_num_rp2350</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DREQ numbers for DMA pacing on RP2350 (used as typedef <a class="el" href="group__hardware__dma.html#ga8def0ea481095c94f3a0dd0b4fed999e">dreq_num_t</a>) </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ad7529b7e45af2d7eab4b740ff15b49d8" name="gga6f0a19defc495cfa6078364122266014ad7529b7e45af2d7eab4b740ff15b49d8"></a>DREQ_PIO0_TX0&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ac5fedec084064e1d9ff9c6a382c1ccf8" name="gga6f0a19defc495cfa6078364122266014ac5fedec084064e1d9ff9c6a382c1ccf8"></a>DREQ_PIO0_TX1&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aa2e360dbf123d634d08e5fae27aa29e5" name="gga6f0a19defc495cfa6078364122266014aa2e360dbf123d634d08e5fae27aa29e5"></a>DREQ_PIO0_TX2&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a156b1b999c6b2dd877545c8c79060a30" name="gga6f0a19defc495cfa6078364122266014a156b1b999c6b2dd877545c8c79060a30"></a>DREQ_PIO0_TX3&#160;</td><td class="fielddoc"><p >Select PIO0's TX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ac4bc12d74b758a7b39c1977c401e2fe1" name="gga6f0a19defc495cfa6078364122266014ac4bc12d74b758a7b39c1977c401e2fe1"></a>DREQ_PIO0_RX0&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a19b55b49bb618eed839edccba14c0d8f" name="gga6f0a19defc495cfa6078364122266014a19b55b49bb618eed839edccba14c0d8f"></a>DREQ_PIO0_RX1&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a967d6b5eb2d3e06113b2b1606ef2af2c" name="gga6f0a19defc495cfa6078364122266014a967d6b5eb2d3e06113b2b1606ef2af2c"></a>DREQ_PIO0_RX2&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a10f8705467782c859f05f82aa3c3c9f5" name="gga6f0a19defc495cfa6078364122266014a10f8705467782c859f05f82aa3c3c9f5"></a>DREQ_PIO0_RX3&#160;</td><td class="fielddoc"><p >Select PIO0's RX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a3c22f2c9eb4a49654bba70dbc99bc893" name="gga6f0a19defc495cfa6078364122266014a3c22f2c9eb4a49654bba70dbc99bc893"></a>DREQ_PIO1_TX0&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a37f1bb39c3aa38a753df88e7e6c57feb" name="gga6f0a19defc495cfa6078364122266014a37f1bb39c3aa38a753df88e7e6c57feb"></a>DREQ_PIO1_TX1&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a13d7cb74708595298d788ba0ce25f6a0" name="gga6f0a19defc495cfa6078364122266014a13d7cb74708595298d788ba0ce25f6a0"></a>DREQ_PIO1_TX2&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aaa5859ea1daaf5f0760fb4dea23116c3" name="gga6f0a19defc495cfa6078364122266014aaa5859ea1daaf5f0760fb4dea23116c3"></a>DREQ_PIO1_TX3&#160;</td><td class="fielddoc"><p >Select PIO1's TX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a833bfa99e8b74de9bfc1872958a742e3" name="gga6f0a19defc495cfa6078364122266014a833bfa99e8b74de9bfc1872958a742e3"></a>DREQ_PIO1_RX0&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a8da9c5655eb51f2fb8a33b16827796a9" name="gga6f0a19defc495cfa6078364122266014a8da9c5655eb51f2fb8a33b16827796a9"></a>DREQ_PIO1_RX1&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a0198dfe2da7237817e780a483144df8f" name="gga6f0a19defc495cfa6078364122266014a0198dfe2da7237817e780a483144df8f"></a>DREQ_PIO1_RX2&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ab093d84a1df12a37ab6e9d62ee1f6d57" name="gga6f0a19defc495cfa6078364122266014ab093d84a1df12a37ab6e9d62ee1f6d57"></a>DREQ_PIO1_RX3&#160;</td><td class="fielddoc"><p >Select PIO1's RX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a6a3e73df9d0e562b41b571e272100302" name="gga6f0a19defc495cfa6078364122266014a6a3e73df9d0e562b41b571e272100302"></a>DREQ_PIO2_TX0&#160;</td><td class="fielddoc"><p >Select PIO2's TX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a37c21bac317747dda953dca55954db16" name="gga6f0a19defc495cfa6078364122266014a37c21bac317747dda953dca55954db16"></a>DREQ_PIO2_TX1&#160;</td><td class="fielddoc"><p >Select PIO2's TX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014abadc20c78c83d2db4fcf3980f1d5b87f" name="gga6f0a19defc495cfa6078364122266014abadc20c78c83d2db4fcf3980f1d5b87f"></a>DREQ_PIO2_TX2&#160;</td><td class="fielddoc"><p >Select PIO2's TX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aa94c2b7f002c28a6050dda127aeaf3b1" name="gga6f0a19defc495cfa6078364122266014aa94c2b7f002c28a6050dda127aeaf3b1"></a>DREQ_PIO2_TX3&#160;</td><td class="fielddoc"><p >Select PIO2's TX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a8bb28cdeea9248c04665464cabc6b1e6" name="gga6f0a19defc495cfa6078364122266014a8bb28cdeea9248c04665464cabc6b1e6"></a>DREQ_PIO2_RX0&#160;</td><td class="fielddoc"><p >Select PIO2's RX FIFO 0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a58a5eb511f85599b5e2b93cee7537b18" name="gga6f0a19defc495cfa6078364122266014a58a5eb511f85599b5e2b93cee7537b18"></a>DREQ_PIO2_RX1&#160;</td><td class="fielddoc"><p >Select PIO2's RX FIFO 1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a9f4f2e7b3cf525ff519db02b0047bf87" name="gga6f0a19defc495cfa6078364122266014a9f4f2e7b3cf525ff519db02b0047bf87"></a>DREQ_PIO2_RX2&#160;</td><td class="fielddoc"><p >Select PIO2's RX FIFO 2 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ae7c631f739c8fb2e161c88911376ab26" name="gga6f0a19defc495cfa6078364122266014ae7c631f739c8fb2e161c88911376ab26"></a>DREQ_PIO2_RX3&#160;</td><td class="fielddoc"><p >Select PIO2's RX FIFO 3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a4b8b13f940414660401a7b334d85b64b" name="gga6f0a19defc495cfa6078364122266014a4b8b13f940414660401a7b334d85b64b"></a>DREQ_SPI0_TX&#160;</td><td class="fielddoc"><p >Select SPI0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a46641088908dd355dc82971e7c7fbd35" name="gga6f0a19defc495cfa6078364122266014a46641088908dd355dc82971e7c7fbd35"></a>DREQ_SPI0_RX&#160;</td><td class="fielddoc"><p >Select SPI0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a01d244742e157d2d2fb8e55b5fd6d81b" name="gga6f0a19defc495cfa6078364122266014a01d244742e157d2d2fb8e55b5fd6d81b"></a>DREQ_SPI1_TX&#160;</td><td class="fielddoc"><p >Select SPI1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a04665a3e6a5c58a6cbf2d0fe1503cf00" name="gga6f0a19defc495cfa6078364122266014a04665a3e6a5c58a6cbf2d0fe1503cf00"></a>DREQ_SPI1_RX&#160;</td><td class="fielddoc"><p >Select SPI1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a80ecb62e37f0c5af2780b93d4995326d" name="gga6f0a19defc495cfa6078364122266014a80ecb62e37f0c5af2780b93d4995326d"></a>DREQ_UART0_TX&#160;</td><td class="fielddoc"><p >Select UART0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a4812587fa3aa4cfd7ea0d91e20246b95" name="gga6f0a19defc495cfa6078364122266014a4812587fa3aa4cfd7ea0d91e20246b95"></a>DREQ_UART0_RX&#160;</td><td class="fielddoc"><p >Select UART0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aa64110e7f89692b9c789275b4d8b04c0" name="gga6f0a19defc495cfa6078364122266014aa64110e7f89692b9c789275b4d8b04c0"></a>DREQ_UART1_TX&#160;</td><td class="fielddoc"><p >Select UART1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ae5c7e2a566983a1148113e2987e059d5" name="gga6f0a19defc495cfa6078364122266014ae5c7e2a566983a1148113e2987e059d5"></a>DREQ_UART1_RX&#160;</td><td class="fielddoc"><p >Select UART1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a2a861c9dcce9e158ace7bc5d547ebde1" name="gga6f0a19defc495cfa6078364122266014a2a861c9dcce9e158ace7bc5d547ebde1"></a>DREQ_PWM_WRAP0&#160;</td><td class="fielddoc"><p >Select PWM Counter 0's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a1504bdb2bd8aaa535903ea11aa2c2994" name="gga6f0a19defc495cfa6078364122266014a1504bdb2bd8aaa535903ea11aa2c2994"></a>DREQ_PWM_WRAP1&#160;</td><td class="fielddoc"><p >Select PWM Counter 1's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014acb766e3b38daca5c8cd35459d835d7a2" name="gga6f0a19defc495cfa6078364122266014acb766e3b38daca5c8cd35459d835d7a2"></a>DREQ_PWM_WRAP2&#160;</td><td class="fielddoc"><p >Select PWM Counter 2's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a017ebaacb45d90c4f20db2d5edded874" name="gga6f0a19defc495cfa6078364122266014a017ebaacb45d90c4f20db2d5edded874"></a>DREQ_PWM_WRAP3&#160;</td><td class="fielddoc"><p >Select PWM Counter 3's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a5fdd41bb900549d6ff26772cc9fd507a" name="gga6f0a19defc495cfa6078364122266014a5fdd41bb900549d6ff26772cc9fd507a"></a>DREQ_PWM_WRAP4&#160;</td><td class="fielddoc"><p >Select PWM Counter 4's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aced239695d7bf65c41827e1eb6cbc04a" name="gga6f0a19defc495cfa6078364122266014aced239695d7bf65c41827e1eb6cbc04a"></a>DREQ_PWM_WRAP5&#160;</td><td class="fielddoc"><p >Select PWM Counter 5's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014add0e022489d6ad4f835a97c6e354c15b" name="gga6f0a19defc495cfa6078364122266014add0e022489d6ad4f835a97c6e354c15b"></a>DREQ_PWM_WRAP6&#160;</td><td class="fielddoc"><p >Select PWM Counter 6's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014adafe5a7f2f401a496e842c7a2c95dac5" name="gga6f0a19defc495cfa6078364122266014adafe5a7f2f401a496e842c7a2c95dac5"></a>DREQ_PWM_WRAP7&#160;</td><td class="fielddoc"><p >Select PWM Counter 7's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a4ab337ff0746f2d9d432020658a478af" name="gga6f0a19defc495cfa6078364122266014a4ab337ff0746f2d9d432020658a478af"></a>DREQ_PWM_WRAP8&#160;</td><td class="fielddoc"><p >Select PWM Counter 8's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a8d7bd836d3ba015fc800e227b6408f73" name="gga6f0a19defc495cfa6078364122266014a8d7bd836d3ba015fc800e227b6408f73"></a>DREQ_PWM_WRAP9&#160;</td><td class="fielddoc"><p >Select PWM Counter 9's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ad17feaa0e6a99ccf14b5d7285ab363d1" name="gga6f0a19defc495cfa6078364122266014ad17feaa0e6a99ccf14b5d7285ab363d1"></a>DREQ_PWM_WRAP10&#160;</td><td class="fielddoc"><p >Select PWM Counter 0's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a14ba987e523bd38f813f93322d053a4c" name="gga6f0a19defc495cfa6078364122266014a14ba987e523bd38f813f93322d053a4c"></a>DREQ_PWM_WRAP11&#160;</td><td class="fielddoc"><p >Select PWM Counter 1's Wrap Value as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ab51c1095a1fec8ad39050cf49fd01835" name="gga6f0a19defc495cfa6078364122266014ab51c1095a1fec8ad39050cf49fd01835"></a>DREQ_I2C0_TX&#160;</td><td class="fielddoc"><p >Select I2C0's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a675d15a4afa861045235a441d46d0580" name="gga6f0a19defc495cfa6078364122266014a675d15a4afa861045235a441d46d0580"></a>DREQ_I2C0_RX&#160;</td><td class="fielddoc"><p >Select I2C0's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a74c786868da56dbb18b7da2c7748568f" name="gga6f0a19defc495cfa6078364122266014a74c786868da56dbb18b7da2c7748568f"></a>DREQ_I2C1_TX&#160;</td><td class="fielddoc"><p >Select I2C1's TX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a0b5156eb2381872ddc1837d83de16b8b" name="gga6f0a19defc495cfa6078364122266014a0b5156eb2381872ddc1837d83de16b8b"></a>DREQ_I2C1_RX&#160;</td><td class="fielddoc"><p >Select I2C1's RX FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a5f3aedb5ef1de25b99afcde8742b4590" name="gga6f0a19defc495cfa6078364122266014a5f3aedb5ef1de25b99afcde8742b4590"></a>DREQ_ADC&#160;</td><td class="fielddoc"><p >Select the ADC as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014aedbcc51f819f4c85c3ab8f51b654ebdc" name="gga6f0a19defc495cfa6078364122266014aedbcc51f819f4c85c3ab8f51b654ebdc"></a>DREQ_XIP_STREAM&#160;</td><td class="fielddoc"><p >Select the XIP Streaming FIFO as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a79533c8a78e8f62f1f564954a755e02a" name="gga6f0a19defc495cfa6078364122266014a79533c8a78e8f62f1f564954a755e02a"></a>DREQ_XIP_QMITX&#160;</td><td class="fielddoc"><p >Select XIP_QMITX as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a35519b1f622ee38560ffd2dfa1571c9b" name="gga6f0a19defc495cfa6078364122266014a35519b1f622ee38560ffd2dfa1571c9b"></a>DREQ_XIP_QMIRX&#160;</td><td class="fielddoc"><p >Select XIP_QMIRX as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a71865f5a1fc034131dfb351d2c830c03" name="gga6f0a19defc495cfa6078364122266014a71865f5a1fc034131dfb351d2c830c03"></a>DREQ_HSTX&#160;</td><td class="fielddoc"><p >Select HSTX as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a1ef0656e59fedc445052acc548cce490" name="gga6f0a19defc495cfa6078364122266014a1ef0656e59fedc445052acc548cce490"></a>DREQ_CORESIGHT&#160;</td><td class="fielddoc"><p >Select CORESIGHT as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a7a5f3a4ca267d2cd53c43779fb5494ba" name="gga6f0a19defc495cfa6078364122266014a7a5f3a4ca267d2cd53c43779fb5494ba"></a>DREQ_SHA256&#160;</td><td class="fielddoc"><p >Select SHA256 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a49bb6d90479edbff257068afd1a5bfe1" name="gga6f0a19defc495cfa6078364122266014a49bb6d90479edbff257068afd1a5bfe1"></a>DREQ_DMA_TIMER0&#160;</td><td class="fielddoc"><p >Select DMA_TIMER0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a11c9291490c2ddf45df69f45a2f83dcf" name="gga6f0a19defc495cfa6078364122266014a11c9291490c2ddf45df69f45a2f83dcf"></a>DREQ_DMA_TIMER1&#160;</td><td class="fielddoc"><p >Select DMA_TIMER0 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014abb60a9d9038192f9db081b51b9c23f65" name="gga6f0a19defc495cfa6078364122266014abb60a9d9038192f9db081b51b9c23f65"></a>DREQ_DMA_TIMER2&#160;</td><td class="fielddoc"><p >Select DMA_TIMER1 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014a86d08425822a129c3eaa1479e920c67c" name="gga6f0a19defc495cfa6078364122266014a86d08425822a129c3eaa1479e920c67c"></a>DREQ_DMA_TIMER3&#160;</td><td class="fielddoc"><p >Select DMA_TIMER3 as DREQ. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga6f0a19defc495cfa6078364122266014ae683f0bb3ee8b854fe4cea850cf9d4c8" name="gga6f0a19defc495cfa6078364122266014ae683f0bb3ee8b854fe4cea850cf9d4c8"></a>DREQ_FORCE&#160;</td><td class="fielddoc"><p >Select FORCE as DREQ. </p>
</td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga735e7c6c136c078689ead70790f4edb2" name="ga735e7c6c136c078689ead70790f4edb2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga735e7c6c136c078689ead70790f4edb2">&#9670;&nbsp;</a></span>dma_channel_abort()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_abort </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Stop a DMA transfer. </p>
<p >Function will only return once the DMA has stopped.</p>
<p >RP2040 only: Note that due to errata RP2040-E13, aborting a channel which has transfers in-flight (i.e. an individual read has taken place but the corresponding write has not), the ABORT status bit will clear prematurely, and subsequently the in-flight transfers will trigger a completion interrupt once they complete. </p>
<p >The effect of this is that you <em>may</em> see a spurious completion interrupt on the channel as a result of calling this method.</p>
<p >The calling code should be sure to ignore a completion IRQ as a result of this method. This may not require any additional work, as aborting a channel which may be about to complete, when you have a completion IRQ handler registered, is inherently race-prone, and so code is likely needed to disambiguate the two occurrences.</p>
<p >If that is not the case, but you do have a channel completion IRQ handler registered, you can simply disable/re-enable the IRQ around the call to this method as shown by this code fragment (using DMA IRQ0).</p>
<div class="fragment"><div class="line"><span class="comment">// disable the channel on IRQ0</span></div>
<div class="line"><a class="code hl_function" href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">dma_channel_set_irq0_enabled</a>(channel, <span class="keyword">false</span>);</div>
<div class="line"><span class="comment">// abort the channel</span></div>
<div class="line"><a class="code hl_function" href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">dma_channel_abort</a>(channel);</div>
<div class="line"><span class="comment">// clear the spurious IRQ (if there was one)</span></div>
<div class="line"><a class="code hl_function" href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">dma_channel_acknowledge_irq0</a>(channel);</div>
<div class="line"><span class="comment">// re-enable the channel on IRQ0</span></div>
<div class="line"><a class="code hl_function" href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">dma_channel_set_irq0_enabled</a>(channel, <span class="keyword">true</span>);</div>
<div class="ttc" id="agroup__hardware__dma_html_ga735e7c6c136c078689ead70790f4edb2"><div class="ttname"><a href="group__hardware__dma.html#ga735e7c6c136c078689ead70790f4edb2">dma_channel_abort</a></div><div class="ttdeci">static void dma_channel_abort(uint channel)</div><div class="ttdoc">Stop a DMA transfer.</div><div class="ttdef"><b>Definition:</b> dma.h:544</div></div>
<div class="ttc" id="agroup__hardware__dma_html_gaf60011d46676c87b7139f37188eaa4b9"><div class="ttname"><a href="group__hardware__dma.html#gaf60011d46676c87b7139f37188eaa4b9">dma_channel_set_irq0_enabled</a></div><div class="ttdeci">static void dma_channel_set_irq0_enabled(uint channel, bool enabled)</div><div class="ttdoc">Enable single DMA channel's interrupt via DMA_IRQ_0.</div><div class="ttdef"><b>Definition:</b> dma.h:558</div></div>
<div class="ttc" id="agroup__hardware__dma_html_gafefe50f20c44bcfa7f729829a5d494f4"><div class="ttname"><a href="group__hardware__dma.html#gafefe50f20c44bcfa7f729829a5d494f4">dma_channel_acknowledge_irq0</a></div><div class="ttdeci">static void dma_channel_acknowledge_irq0(uint channel)</div><div class="ttdoc">Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_0.</div><div class="ttdef"><b>Definition:</b> dma.h:682</div></div>
</div><!-- fragment --><p >RP2350 only: Due to errata RP12350-E5 (see the RP2350 datasheet for further detail), it is necessary to clear the enable bit of the aborted channel and any chained channels prior to the abort to prevent re-triggering. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gafefe50f20c44bcfa7f729829a5d494f4" name="gafefe50f20c44bcfa7f729829a5d494f4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafefe50f20c44bcfa7f729829a5d494f4">&#9670;&nbsp;</a></span>dma_channel_acknowledge_irq0()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_acknowledge_irq0 </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_0. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga4d4b5d461ff09bb6e4e2a05df3b7c75c" name="ga4d4b5d461ff09bb6e4e2a05df3b7c75c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4d4b5d461ff09bb6e4e2a05df3b7c75c">&#9670;&nbsp;</a></span>dma_channel_acknowledge_irq1()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_acknowledge_irq1 </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gae1b3c916746b3d2052f21b7dda34aab9" name="gae1b3c916746b3d2052f21b7dda34aab9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae1b3c916746b3d2052f21b7dda34aab9">&#9670;&nbsp;</a></span>dma_channel_claim()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_channel_claim </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark a dma channel as used. </p>
<p >Method for cooperative claiming of hardware. Will cause a panic if the channel is already claimed. Use of this method by libraries detects accidental configurations that would fail in unpredictable ways.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>the dma channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga655130988c1045bdf711135698adf321" name="ga655130988c1045bdf711135698adf321"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga655130988c1045bdf711135698adf321">&#9670;&nbsp;</a></span>dma_channel_cleanup()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_channel_cleanup </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Performs DMA channel cleanup after use. </p>
<p >This can be used to cleanup dma channels when they're no longer needed, such that they are in a clean state for reuse. IRQ's for the channel are disabled, any in flight-transfer is aborted and any outstanding interrupts are cleared. The channel is then clear to be reused for other purposes.</p>
<div class="fragment"><div class="line"><span class="keywordflow">if</span> (dma_channel &gt;= 0) {</div>
<div class="line">    <a class="code hl_function" href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">dma_channel_cleanup</a>(dma_channel);</div>
<div class="line">    <a class="code hl_function" href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">dma_channel_unclaim</a>(dma_channel);</div>
<div class="line">    dma_channel = -1;</div>
<div class="line">}</div>
<div class="ttc" id="agroup__hardware__dma_html_ga655130988c1045bdf711135698adf321"><div class="ttname"><a href="group__hardware__dma.html#ga655130988c1045bdf711135698adf321">dma_channel_cleanup</a></div><div class="ttdeci">void dma_channel_cleanup(uint channel)</div><div class="ttdoc">Performs DMA channel cleanup after use.</div><div class="ttdef"><b>Definition:</b> dma.c:73</div></div>
<div class="ttc" id="agroup__hardware__dma_html_gac50200739b88a2fd52316f4150533035"><div class="ttname"><a href="group__hardware__dma.html#gac50200739b88a2fd52316f4150533035">dma_channel_unclaim</a></div><div class="ttdeci">void dma_channel_unclaim(uint channel)</div><div class="ttdoc">Mark a dma channel as no longer used.</div><div class="ttdef"><b>Definition:</b> dma.c:34</div></div>
</div><!-- fragment --><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga971d077ac39b2d7f7c6b45e2ddc5d190" name="ga971d077ac39b2d7f7c6b45e2ddc5d190"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga971d077ac39b2d7f7c6b45e2ddc5d190">&#9670;&nbsp;</a></span>dma_channel_configure()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_configure </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">volatile void *&#160;</td>
          <td class="paramname"><em>write_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const volatile void *&#160;</td>
          <td class="paramname"><em>read_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>transfer_count</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>trigger</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Configure all DMA parameters and optionally start transfer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">config</td><td>Pointer to DMA config structure </td></tr>
    <tr><td class="paramname">write_addr</td><td>Initial write address </td></tr>
    <tr><td class="paramname">read_addr</td><td>Initial read address </td></tr>
    <tr><td class="paramname">transfer_count</td><td>Number of transfers to perform </td></tr>
    <tr><td class="paramname">trigger</td><td>True to start the transfer immediately </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaa86e892c47b054d3c22fa39c001c7c23" name="gaa86e892c47b054d3c22fa39c001c7c23"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa86e892c47b054d3c22fa39c001c7c23">&#9670;&nbsp;</a></span>dma_channel_get_irq0_status()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static bool dma_channel_get_irq0_status </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Determine if a particular channel is a cause of DMA_IRQ_0. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the channel is a cause of DMA_IRQ_0, false otherwise </dd></dl>

</div>
</div>
<a id="gaf61d25264e49058d20fb607dc1c40981" name="gaf61d25264e49058d20fb607dc1c40981"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf61d25264e49058d20fb607dc1c40981">&#9670;&nbsp;</a></span>dma_channel_get_irq1_status()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static bool dma_channel_get_irq1_status </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Determine if a particular channel is a cause of DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the channel is a cause of DMA_IRQ_1, false otherwise </dd></dl>

</div>
</div>
<a id="gafbb5020a529ed6d39a11da88a6f313f2" name="gafbb5020a529ed6d39a11da88a6f313f2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafbb5020a529ed6d39a11da88a6f313f2">&#9670;&nbsp;</a></span>dma_channel_is_busy()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static bool dma_channel_is_busy </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Check if DMA channel is busy. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the channel is currently busy </dd></dl>

</div>
</div>
<a id="ga9aadb81f53b979bde1c1a81164d1eff2" name="ga9aadb81f53b979bde1c1a81164d1eff2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9aadb81f53b979bde1c1a81164d1eff2">&#9670;&nbsp;</a></span>dma_channel_is_claimed()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">bool dma_channel_is_claimed </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Determine if a dma channel is claimed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>the dma channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the channel is claimed, false otherwise </dd></dl>
<dl class="section see"><dt>See also</dt><dd><a class="el" href="group__hardware__dma.html#gae1b3c916746b3d2052f21b7dda34aab9" title="Mark a dma channel as used.">dma_channel_claim</a> </dd>
<dd>
dma_channel_claim_mask </dd></dl>

</div>
</div>
<a id="ga7449b659efb178a408f42f7f8f7b02f9" name="ga7449b659efb178a408f42f7f8f7b02f9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7449b659efb178a408f42f7f8f7b02f9">&#9670;&nbsp;</a></span>dma_channel_set_config()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_config </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const <a class="el" href="structdma__channel__config.html">dma_channel_config</a> *&#160;</td>
          <td class="paramname"><em>config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>trigger</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set a channel configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">config</td><td>Pointer to a config structure with required configuration </td></tr>
    <tr><td class="paramname">trigger</td><td>True to trigger the transfer immediately </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaf60011d46676c87b7139f37188eaa4b9" name="gaf60011d46676c87b7139f37188eaa4b9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf60011d46676c87b7139f37188eaa4b9">&#9670;&nbsp;</a></span>dma_channel_set_irq0_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_irq0_enabled </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable single DMA channel's interrupt via DMA_IRQ_0. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable interrupt 0 on specified channel, false to disable. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga4f9415c8f77ff0bacedf5a138a88d76f" name="ga4f9415c8f77ff0bacedf5a138a88d76f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4f9415c8f77ff0bacedf5a138a88d76f">&#9670;&nbsp;</a></span>dma_channel_set_irq1_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_irq1_enabled </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable single DMA channel's interrupt via DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable interrupt 1 on specified channel, false to disable. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gabf6f6ffe56fa42dcb105032f110589ae" name="gabf6f6ffe56fa42dcb105032f110589ae"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabf6f6ffe56fa42dcb105032f110589ae">&#9670;&nbsp;</a></span>dma_channel_set_read_addr()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_read_addr </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const volatile void *&#160;</td>
          <td class="paramname"><em>read_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>trigger</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set the DMA initial read address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">read_addr</td><td>Initial read address of transfer. </td></tr>
    <tr><td class="paramname">trigger</td><td>True to start the transfer immediately </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga16c0e08eda636f13053d8c8b0f81e821" name="ga16c0e08eda636f13053d8c8b0f81e821"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga16c0e08eda636f13053d8c8b0f81e821">&#9670;&nbsp;</a></span>dma_channel_set_trans_count()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_trans_count </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>trans_count</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>trigger</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set the number of bus transfers the channel will do. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">trans_count</td><td>The number of transfers (not NOT bytes, see channel_config_set_transfer_data_size) </td></tr>
    <tr><td class="paramname">trigger</td><td>True to start the transfer immediately </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaf0156609fe51c07d07118b2aeb4e9ae6" name="gaf0156609fe51c07d07118b2aeb4e9ae6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf0156609fe51c07d07118b2aeb4e9ae6">&#9670;&nbsp;</a></span>dma_channel_set_write_addr()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_set_write_addr </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">volatile void *&#160;</td>
          <td class="paramname"><em>write_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>trigger</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set the DMA initial write address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">write_addr</td><td>Initial write address of transfer. </td></tr>
    <tr><td class="paramname">trigger</td><td>True to start the transfer immediately </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga355720e02713c7324b540efc6f632366" name="ga355720e02713c7324b540efc6f632366"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga355720e02713c7324b540efc6f632366">&#9670;&nbsp;</a></span>dma_channel_start()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_start </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Start a single DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gabf64c461a405a8114591105d9dc53575" name="gabf64c461a405a8114591105d9dc53575"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabf64c461a405a8114591105d9dc53575">&#9670;&nbsp;</a></span>dma_channel_transfer_from_buffer_now()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_transfer_from_buffer_now </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">const volatile void *&#160;</td>
          <td class="paramname"><em>read_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>transfer_count</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Start a DMA transfer from a buffer immediately. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">read_addr</td><td>Sets the initial read address </td></tr>
    <tr><td class="paramname">transfer_count</td><td>Number of transfers to make. Not bytes, but the number of transfers of <a class="el" href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0" title="Set the size of each DMA bus transfer in a channel configuration object.">channel_config_set_transfer_data_size()</a> to be sent. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga9110135d8161fc268d87dfb040d0f854" name="ga9110135d8161fc268d87dfb040d0f854"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9110135d8161fc268d87dfb040d0f854">&#9670;&nbsp;</a></span>dma_channel_transfer_to_buffer_now()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_transfer_to_buffer_now </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">volatile void *&#160;</td>
          <td class="paramname"><em>write_addr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>transfer_count</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Start a DMA transfer to a buffer immediately. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">write_addr</td><td>Sets the initial write address </td></tr>
    <tr><td class="paramname">transfer_count</td><td>Number of transfers to make. Not bytes, but the number of transfers of <a class="el" href="group__channel__config.html#gad1a02fcee90d21f133460006b025bac0" title="Set the size of each DMA bus transfer in a channel configuration object.">channel_config_set_transfer_data_size()</a> to be sent. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gac50200739b88a2fd52316f4150533035" name="gac50200739b88a2fd52316f4150533035"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac50200739b88a2fd52316f4150533035">&#9670;&nbsp;</a></span>dma_channel_unclaim()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_channel_unclaim </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark a dma channel as no longer used. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>the dma channel to release </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gab57c68850b8e6ed1623de75ad611db62" name="gab57c68850b8e6ed1623de75ad611db62"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab57c68850b8e6ed1623de75ad611db62">&#9670;&nbsp;</a></span>dma_channel_wait_for_finish_blocking()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_channel_wait_for_finish_blocking </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Wait for a DMA channel transfer to complete. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaa430bc53dc2b36d727ad976f6348c8b3" name="gaa430bc53dc2b36d727ad976f6348c8b3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa430bc53dc2b36d727ad976f6348c8b3">&#9670;&nbsp;</a></span>dma_claim_mask()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_claim_mask </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>channel_mask</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark multiple dma channels as used. </p>
<p >Method for cooperative claiming of hardware. Will cause a panic if any of the channels are already claimed. Use of this method by libraries detects accidental configurations that would fail in unpredictable ways.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel_mask</td><td>Bitfield of all required channels to claim (bit 0 == channel 0, bit 1 == channel 1 etc) </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga4b0a6680795b9c9ed787362a8a057206" name="ga4b0a6680795b9c9ed787362a8a057206"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4b0a6680795b9c9ed787362a8a057206">&#9670;&nbsp;</a></span>dma_claim_unused_channel()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int dma_claim_unused_channel </td>
          <td>(</td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>required</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Claim a free dma channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">required</td><td>if true the function will panic if none are available </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>the dma channel number or -1 if required was false, and none were free </dd></dl>

</div>
</div>
<a id="ga2f218b6acd97e09430afbb74172bd570" name="ga2f218b6acd97e09430afbb74172bd570"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2f218b6acd97e09430afbb74172bd570">&#9670;&nbsp;</a></span>dma_claim_unused_timer()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int dma_claim_unused_timer </td>
          <td>(</td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>required</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Claim a free dma timer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">required</td><td>if true the function will panic if none are available </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>the dma timer number or -1 if required was false, and none were free </dd></dl>

</div>
</div>
<a id="ga5da1507764272564a75939e2cf38fa9a" name="ga5da1507764272564a75939e2cf38fa9a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5da1507764272564a75939e2cf38fa9a">&#9670;&nbsp;</a></span>dma_get_irq_num()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static int dma_get_irq_num </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>irq_index</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Return DMA_IRQ_&lt;irqn&gt; </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">irq_index</td><td>0 the DMA irq index </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The <a class="el" href="group__hardware__irq.html#gaf30862f51b5994ffd5863176a185d137">irq_num_t</a> to use for DMA </dd></dl>

</div>
</div>
<a id="ga75ef6881795fd1760fe813f9e0a79223" name="ga75ef6881795fd1760fe813f9e0a79223"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga75ef6881795fd1760fe813f9e0a79223">&#9670;&nbsp;</a></span>dma_get_timer_dreq()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static uint dma_get_timer_dreq </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>timer_num</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Return the DREQ number for a given DMA timer. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">timer_num</td><td>DMA timer number 0-3 </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gad0e8e022fbe67b80c16912254526fada" name="gad0e8e022fbe67b80c16912254526fada"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad0e8e022fbe67b80c16912254526fada">&#9670;&nbsp;</a></span>dma_irqn_acknowledge_channel()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_irqn_acknowledge_channel </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>irq_index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Acknowledge a channel IRQ, resetting it as the cause of DMA_IRQ_N. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">irq_index</td><td>the IRQ index; either 0 or 1 for DMA_IRQ_0 or DMA_IRQ_1 </td></tr>
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga43f1fe10d5eb241788f72ad11599fc11" name="ga43f1fe10d5eb241788f72ad11599fc11"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga43f1fe10d5eb241788f72ad11599fc11">&#9670;&nbsp;</a></span>dma_irqn_get_channel_status()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static bool dma_irqn_get_channel_status </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>irq_index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Determine if a particular channel is a cause of DMA_IRQ_N. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">irq_index</td><td>the IRQ index; either 0 or 1 for DMA_IRQ_0 or DMA_IRQ_1 </td></tr>
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the channel is a cause of the DMA_IRQ_N, false otherwise </dd></dl>

</div>
</div>
<a id="ga6fefe19fa5539580315de923e42131d3" name="ga6fefe19fa5539580315de923e42131d3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6fefe19fa5539580315de923e42131d3">&#9670;&nbsp;</a></span>dma_irqn_set_channel_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_irqn_set_channel_enabled </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>irq_index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable single DMA channel interrupt on either DMA_IRQ_0 or DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">irq_index</td><td>the IRQ index; either 0 or 1 for DMA_IRQ_0 or DMA_IRQ_1 </td></tr>
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable interrupt via irq_index for specified channel, false to disable. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga720f2335e93b0e53e28959566ca18f3e" name="ga720f2335e93b0e53e28959566ca18f3e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga720f2335e93b0e53e28959566ca18f3e">&#9670;&nbsp;</a></span>dma_irqn_set_channel_mask_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_irqn_set_channel_mask_enabled </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>irq_index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>channel_mask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable multiple DMA channels' interrupt via either DMA_IRQ_0 or DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">irq_index</td><td>the IRQ index; either 0 or 1 for DMA_IRQ_0 or DMA_IRQ_1 </td></tr>
    <tr><td class="paramname">channel_mask</td><td>Bitmask of all the channels to enable/disable. Channel 0 = bit 0, channel 1 = bit 1 etc. </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable all the interrupts specified in the mask, false to disable all the interrupts specified in the mask. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gad5c1ac22e0b4d9b831912fbb95460be4" name="gad5c1ac22e0b4d9b831912fbb95460be4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad5c1ac22e0b4d9b831912fbb95460be4">&#9670;&nbsp;</a></span>dma_set_irq0_channel_mask_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_set_irq0_channel_mask_enabled </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>channel_mask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable multiple DMA channels' interrupts via DMA_IRQ_0. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel_mask</td><td>Bitmask of all the channels to enable/disable. Channel 0 = bit 0, channel 1 = bit 1 etc. </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable all the interrupts specified in the mask, false to disable all the interrupts specified in the mask. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaaa20edc55a2cc4977d24bdb487a22aa5" name="gaaa20edc55a2cc4977d24bdb487a22aa5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaa20edc55a2cc4977d24bdb487a22aa5">&#9670;&nbsp;</a></span>dma_set_irq1_channel_mask_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_set_irq1_channel_mask_enabled </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>channel_mask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enabled</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable multiple DMA channels' interrupts via DMA_IRQ_1. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel_mask</td><td>Bitmask of all the channels to enable/disable. Channel 0 = bit 0, channel 1 = bit 1 etc. </td></tr>
    <tr><td class="paramname">enabled</td><td>true to enable all the interrupts specified in the mask, false to disable all the interrupts specified in the mask. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga078c3c80d5637850ec64e8f5ad5ce0c2" name="ga078c3c80d5637850ec64e8f5ad5ce0c2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga078c3c80d5637850ec64e8f5ad5ce0c2">&#9670;&nbsp;</a></span>dma_sniffer_enable()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_sniffer_enable </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>mode</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>force_channel_enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable the DMA sniffing targeting the specified channel. </p>
<p >The mode can be one of the following:</p>
<table class="markdownTable">
<tr class="markdownTableHead">
<th class="markdownTableHeadNone">Mode   </th><th class="markdownTableHeadNone">Function    </th></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">0x0   </td><td class="markdownTableBodyNone">Calculate a CRC-32 (IEEE802.3 polynomial)    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">0x1   </td><td class="markdownTableBodyNone">Calculate a CRC-32 (IEEE802.3 polynomial) with bit reversed data    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">0x2   </td><td class="markdownTableBodyNone">Calculate a CRC-16-CCITT    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">0x3   </td><td class="markdownTableBodyNone">Calculate a CRC-16-CCITT with bit reversed data    </td></tr>
<tr class="markdownTableRowOdd">
<td class="markdownTableBodyNone">0xe   </td><td class="markdownTableBodyNone">XOR reduction over all data. == 1 if the total 1 population count is odd.    </td></tr>
<tr class="markdownTableRowEven">
<td class="markdownTableBodyNone">0xf   </td><td class="markdownTableBodyNone">Calculate a simple 32-bit checksum (addition with a 32 bit accumulator)   </td></tr>
</table>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel</td><td>DMA channel </td></tr>
    <tr><td class="paramname">mode</td><td>See description </td></tr>
    <tr><td class="paramname">force_channel_enable</td><td>Set true to also turn on sniffing in the channel configuration (this is usually what you want, but sometimes you might have a chain DMA with only certain segments of the chain sniffed, in which case you might pass false). </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga3527c2567c9253ca602b91d30ae49d1e" name="ga3527c2567c9253ca602b91d30ae49d1e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3527c2567c9253ca602b91d30ae49d1e">&#9670;&nbsp;</a></span>dma_sniffer_get_data_accumulator()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static uint32_t dma_sniffer_get_data_accumulator </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Get the sniffer's data accumulator value. </p>
<p >Read value calculated by the hardware from sniffing the DMA stream </p>

</div>
</div>
<a id="gac3b250d97550527a584de9d3f770acea" name="gac3b250d97550527a584de9d3f770acea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac3b250d97550527a584de9d3f770acea">&#9670;&nbsp;</a></span>dma_sniffer_set_byte_swap_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_sniffer_set_byte_swap_enabled </td>
          <td>(</td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>swap</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable the Sniffer byte swap function. </p>
<p >Locally perform a byte reverse on the sniffed data, before feeding into checksum.</p>
<p >Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if <a class="el" href="group__channel__config.html#ga43c3a2dd43fe7e962b1de0e90a46bb9e" title="Set DMA byte swapping config in a channel configuration object.">channel_config_set_bswap()</a> and <a class="el" href="group__hardware__dma.html#gac3b250d97550527a584de9d3f770acea" title="Enable the Sniffer byte swap function.">dma_sniffer_set_byte_swap_enabled()</a> are both enabled, their effects cancel from the sniffer’s point of view.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">swap</td><td>Set true to enable byte swapping </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gacab1f8010c206dfc77b81cb16902a4e4" name="gacab1f8010c206dfc77b81cb16902a4e4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacab1f8010c206dfc77b81cb16902a4e4">&#9670;&nbsp;</a></span>dma_sniffer_set_data_accumulator()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_sniffer_set_data_accumulator </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>seed_value</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set the sniffer's data accumulator with initial value. </p>
<p >Generally, CRC algorithms are used with the data accumulator initially seeded with 0xFFFF or 0xFFFFFFFF (for crc16 and crc32 algorithms)</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">seed_value</td><td>value to set data accumulator </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga1366c938a8322aa1eb8e703b1f22d6af" name="ga1366c938a8322aa1eb8e703b1f22d6af"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1366c938a8322aa1eb8e703b1f22d6af">&#9670;&nbsp;</a></span>dma_sniffer_set_output_invert_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_sniffer_set_output_invert_enabled </td>
          <td>(</td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>invert</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable the Sniffer output invert function. </p>
<p >If enabled, the sniff data result appears bit-inverted when read. This does not affect the way the checksum is calculated.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">invert</td><td>Set true to enable output bit inversion </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaa2c5775bdb86d63a4866b2f6f5b41143" name="gaa2c5775bdb86d63a4866b2f6f5b41143"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa2c5775bdb86d63a4866b2f6f5b41143">&#9670;&nbsp;</a></span>dma_sniffer_set_output_reverse_enabled()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_sniffer_set_output_reverse_enabled </td>
          <td>(</td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>reverse</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Enable the Sniffer output bit reversal function. </p>
<p >If enabled, the sniff data result appears bit-reversed when read. This does not affect the way the checksum is calculated.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">reverse</td><td>Set true to enable output bit reversal </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga6407f7763b533c98e23f65e35c5e48ee" name="ga6407f7763b533c98e23f65e35c5e48ee"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6407f7763b533c98e23f65e35c5e48ee">&#9670;&nbsp;</a></span>dma_start_channel_mask()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_start_channel_mask </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>chan_mask</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Start one or more channels simultaneously. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">chan_mask</td><td>Bitmask of all the channels requiring starting. Channel 0 = bit 0, channel 1 = bit 1 etc. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga08fc90c0064510e7a0a2cf8d1cd187bc" name="ga08fc90c0064510e7a0a2cf8d1cd187bc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga08fc90c0064510e7a0a2cf8d1cd187bc">&#9670;&nbsp;</a></span>dma_timer_claim()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_timer_claim </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>timer</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark a dma timer as used. </p>
<p >Method for cooperative claiming of hardware. Will cause a panic if the timer is already claimed. Use of this method by libraries detects accidental configurations that would fail in unpredictable ways.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">timer</td><td>the dma timer </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga9b45bfe6985f8c0894d34876eedc3090" name="ga9b45bfe6985f8c0894d34876eedc3090"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9b45bfe6985f8c0894d34876eedc3090">&#9670;&nbsp;</a></span>dma_timer_is_claimed()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">bool dma_timer_is_claimed </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>timer</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Determine if a dma timer is claimed. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">timer</td><td>the dma timer </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>true if the timer is claimed, false otherwise </dd></dl>
<dl class="section see"><dt>See also</dt><dd><a class="el" href="group__hardware__dma.html#ga08fc90c0064510e7a0a2cf8d1cd187bc" title="Mark a dma timer as used.">dma_timer_claim</a> </dd></dl>

</div>
</div>
<a id="ga58f9c3cb606759e4620c82583f833dc8" name="ga58f9c3cb606759e4620c82583f833dc8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga58f9c3cb606759e4620c82583f833dc8">&#9670;&nbsp;</a></span>dma_timer_set_fraction()</h2>

<div class="memitem">
<div class="memproto">
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static void dma_timer_set_fraction </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>timer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>numerator</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint16_t&#160;</td>
          <td class="paramname"><em>denominator</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">

<p>Set the multiplier for the given DMA timer. </p>
<p >The timer will run at the system_clock_freq * numerator / denominator, so this is the speed that data elements will be transferred at via a DMA channel using this timer as a DREQ. The multiplier must be less than or equal to one.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">timer</td><td>the dma timer </td></tr>
    <tr><td class="paramname">numerator</td><td>the fraction's numerator </td></tr>
    <tr><td class="paramname">denominator</td><td>the fraction's denominator </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga890490576d8806b8933aad0e34d09c5e" name="ga890490576d8806b8933aad0e34d09c5e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga890490576d8806b8933aad0e34d09c5e">&#9670;&nbsp;</a></span>dma_timer_unclaim()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_timer_unclaim </td>
          <td>(</td>
          <td class="paramtype">uint&#160;</td>
          <td class="paramname"><em>timer</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark a dma timer as no longer used. </p>
<p >Method for cooperative claiming of hardware.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">timer</td><td>the dma timer to release </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga0211681c906ebe4971d0cded8e98f8b5" name="ga0211681c906ebe4971d0cded8e98f8b5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0211681c906ebe4971d0cded8e98f8b5">&#9670;&nbsp;</a></span>dma_unclaim_mask()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void dma_unclaim_mask </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>channel_mask</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark multiple dma channels as no longer used. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">channel_mask</td><td>Bitfield of all channels to unclaim (bit 0 == channel 0, bit 1 == channel 1 etc) </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->

	<script src="main.js"></script>
</body>
</html>